STM32F4xx GPIOs Alternate Function

Keywords: Embedded systems, STM32F4, GPIOs, Multiplexed Pins

The number of transistors per square inch will double approximately every 18 months. (revised)

“Moore’s Law”

As per the above Moore’s Law, doubling the number of transistors per square inch mean more and more functionalities can be added to integrated chips per square inch. This means that without increasing the SoC (System on Chip) size, more and more peripheral like timers, USARTS, memory can be squeezed to occupy to same space available on SoC.

Unfortunately this is only applicable to internal space of SoC. The pins size outside the SoC have standard sizes and can’t be reduced any further. If more pins are added on SoC, again the size of SoC will increase to accommodate the space required for extra pins. What it means is even with the advancement of VLSI technology, though more and more functionalities can be integrated on SoC but no extra pins can be added as it will again increase SoC size so the end result will be useless.

In order to overcome this problem, Chip manufacturers decided to multiplex single pin functionality. i.e. a single pin on SoC can do multiple tasks one active at a time. For example a GPIO pin can be used as Digital input/output or as an analog input/output. Similarly another pin may be used to serve multiple functionality like UART (Tx, Rx), SPI (MOSI, MISO, SCLK, SS), PWM etc. as configured. Apart from the default pin function, all other functions that can be configured for a pin are called Alternate Functions.

STM32F4xx Alternate Function:

Many pins of STM32f4xx devices have multiple functions. They acts as GPIO, General Purpose Input/Output under ‘normal’ functionality. All the alternate functions for these pins can be selected directly by writing to the relevant registers. Figure-1 shows how alternate function for a pin can be selected via GPIOx_MODERGPIOx_AFRL and GPIOx_AFRL .

As shown in Figure-1, on the right most is the actual SoC GPIO pin. The functionalities of a Pins is divided into major groups.
1. As Digital Input/Output
2. As Analog Input/Output
3. As Alternate function Pin.

The first step is to decided what functionality is required on a specific pin under consideration. Once decided, the physical pin can be connected to that line via GPIOx_MODER Register/Multiplexer. The GPIOx_MODER is shown in Figure-2.

Figure-2: GPIOx_MODER Register.

MODERx, x = PIN# = {1,2,3 … 15}

MODERx[1:0] bits:
00: Digital Input (reset state)
01: General purpose output mode
10: Alternate function mode
11: Analog mode

For example, lets say we want to configure GPIOA port Pin#1 as an alternate function. In order to do so, bit-2 of GPIOA_MODER should be set to 0 and bit-3 of GPIOA_MODER should be set to 1.

After configuring GPIOx_MODER for ‘Alternate Function’, the physical pin is now connected to Alternate Function line. The next step is to connect Alternate function line to Alternate function implementor module. This is done via GPIOx_AFRL and GPIOx_AFRH registers.

GPIOx_AFRL: For Lower GPIOx 8-Pins. i.e. Pin#0 – to – Pin#7.
GPIOx_AFRH: For upper GPIOx 8-Pins. i.e. Pin#8 – to – Pin#15.

Following are the codes for alternate functions (AF0-A15).

Alternate FunctionCodeAlternate FunctionCode

Now which alternate function line (AF0 – AF15) connects to which Module (USART, I2C etc.) is implementation dependent. For example alternate functions on STM32F405xx/07xx and STM32F415xx/17xx are as shown in figure-5, figure-6.

Note: Not every GPIO pin can be connected to any Alternate Function (AF0 – AF15). Each Pin is assigned a number of available alternate functions as decided by Manufacturer. For example on STM32F407xx, PA15 pin is multiplexed with TIM 2_CH1, TIM 2_ETR, SPI1_NSS, and SPI3_NSS/ I2S3_W functionalities; – Alternate function mapping Reference Table-9 [1]. For more details on which pin is multiplexed with which modules, see relevant Reference Manual or Data sheet. Normally pins diagram in Datasheet gives the details.

[1] – Reference manual-RM0090

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